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IRIS: A platform to assess, detect and respond to vulnerabilities and threats in ICT networks
March 18, 2022The Architectures and Compilers (ARCO) research group is working on the CoCoUnit project to design new architectures for computing systems that are energy efficient, particularly for applications that make intensive use of cognitive functionalities, such as voice recognition, automatic translation, speech synthesis, image classification or object recognition.

A disruptive approach is followed through research into unconventional architectures that dramatically improve energy efficiency and at the same time make substantial improvements in performance. These platforms use various types of specialised units for various fields. There is a special focus on graphics processing units and architectures inspired by the brain (for example, neural networks) due to their potential to exploit mass parallelism and their high energy efficiency. Extensions to existing architecture are proposed combined with innovative accelerators and functional units. The final result of this project is to design platforms that provide new experiences for users in the areas of cognitive computing and computational intelligence in mobile devices and in servers and data centres.
The project is approximately half-way through and the most relevant results to date include:
- The design of a “system-on-chip” that includes various accelerators for the automatic recognition of speech in real time with low energy consumption.
- The design of an accelerator for neural networks that includes innovative techniques to reduce energy consumption, such as the reuse of computations, pruning of neurons and connections, dynamic selection of the precision used in calculations, increase in locality in memory access, and a new mechanism to plan the concurrent execution of many instances of recurring neural networks.
- A detailed characterisation of performance and energy consumption of computing systems for autonomous vehicles and the proposal of an accelerator to optimise one of the main bottlenecks, simultaneous localisation and mapping (SLAM).
- The design of a new unit to improve the performance of GPUs for graph algorithms through fusion and filtering access to memory.
- New microarchitectures for low energy consumption graphics processing units based on exploiting the coherence between successive frames to avoid computations and substantially improve energy efficiency, as well as new ways to organise the memory hierarchy to better exploit locality in access.
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